HBM, or High Bandwidth Memory, is DRAM stacked vertically and placed right beside a GPU or AI chip. It moves data many times faster than DDR5 while using less power per bit. Every HBM chip also eats wafer capacity that would otherwise make regular RAM, which is a big reason PC memory costs so much in 2026.
I have explained below, how it works, HBM3E vs HBM4, who makes it and what comes next.
What Is HBM Memory?
An HBM stack is a tower of DRAM dies, now 8 to 16 layers high, joined by thousands of tiny vertical wires called through silicon vias (TSVs). A base logic die at the bottom handles signals and testing. The finished stack sits millimeters from the processor on a silicon interposer, inside the same package.
The speed comes from width, not clock rate. A DDR5 stick talks over a 64 bit bus, while an HBM3E stack uses 1,024 bits and HBM4 uses 2,048. AMD started the work in 2008 with SK Hynix, and the standard's history runs from JEDEC approval in October 2013.
How Is HBM Made?
A stack takes far more steps than a memory stick:
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DRAM wafer: the memory dies are made much like regular DRAM.
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TSV etching: thousands of vertical holes are cut and filled with copper.
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Wafer thinning: each die is ground down to a fraction of a hair's width.
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Stacking and bonding: dies are stacked with microbumps or hybrid bonding.
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Base die: for HBM4, this logic die is now made at foundries such as TSMC.
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Packaging and testing: the stack is mounted on an interposer next to the processor and tested as one unit.
Here is the catch most explainers skip. If one die in a 12 high stack fails, the whole stack is scrapped, including 11 good dies. That's why most HBM yield loss happens at stacking, not in the DRAM itself.
HBM Generations From HBM to HBM4E
Each generation either raised the speed per pin or widened the bus. These are the headline specs per stack, based on figures from Rambus and JEDEC.
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Generation
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Year
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Pin rate
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Bus width
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Bandwidth per stack
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Max stack
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Max capacity
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HBM
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2013
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1.0 Gb/s
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1,024 bit
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128 GB/s
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4 to 8 high
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Up to 16GB
|
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HBM2
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2016
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2.0 Gb/s
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1,024 bit
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256 GB/s
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8 high
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16GB
|
|
HBM2E
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2018
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3.6 Gb/s
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1,024 bit
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461 GB/s
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12 high
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36GB
|
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HBM3
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2022
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6.4 Gb/s
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1,024 bit
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819 GB/s
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16 high
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64GB
|
|
HBM3E
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2023
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9.6 Gb/s
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1,024 bit
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1.2 TB/s
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16 high
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48 to 64GB
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HBM4
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2025
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8.0 Gb/s
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2,048 bit
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2.0 TB/s
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16 high
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64GB
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HBM4E
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Next
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16 Gb/s
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2,048 bit
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4.1 TB/s
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16 high
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64GB
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1. HBM3E vs HBM4: What Changed
HBM4 doubled the bus to 2,048 bits and the channels to 32, so bandwidth per stack rose from about 1.2 TB/s to 2 TB/s even at a lower pin rate. Its base die moved to logic foundries, which lets chip designers add custom features. Nvidia's Rubin carries up to 288GB of HBM4 and AMD's MI455 up to 432GB, according to HBM4 supplier reports.
2. What Comes After HBM4
HBM4E pushes pins to 16 Gb/s for roughly 4 TB/s per stack, so eight stacks on one chip pass 32 TB/s. HBM5 and HBM6 are expected to grow stacks to 20 and 24 dies.
HBM vs DDR5 vs GDDR7
Here is how HBM compares with the memory types shipping in 2026.
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Feature
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HBM3E / HBM4
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GDDR7
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DDR5
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Build
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3D stacked dies
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Single chips on the board
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Chips on a removable stick
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Bus width
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1,024 or 2,048 bit per stack
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32 bit per chip
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64 bit per stick
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Bandwidth
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1.2 to 2 TB/s per stack
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About 128 GB/s per chip
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About 51 GB/s per DDR5 6400 stick
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Placement
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Inside the processor package
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Around the GPU on the card
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In slots on the motherboard
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Power per bit
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Lowest
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Medium
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Higher
|
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Cost per GB
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Highest
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Medium
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Lowest
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Main use
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AI accelerators, top data center GPUs
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Gaming and workstation GPUs
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PCs, laptops, servers
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HBM costs more per GB because of everything around the DRAM: TSVs, thinning, bonding, the base die, the interposer and the stacks lost to one bad die.
Why HBM Drains Supply From PC RAM
HBM and regular RAM come from the same three makers and often the same fabs. Micron's CEO has said HBM takes about three times the wafer supply of DDR5 for the same bits. Stack losses push that real cost even higher.
Makers still prefer HBM, because AI buyers pay far more per wafer and sign deals years ahead. Micron's entire 2026 HBM4 output was sold out early in the year. Each wafer moved to HBM is one less wafer for DDR4, DDR5 and LPDDR, which is the root of the 2026 RAM price spike. See how that hits volume buyers in our DDR4 vs DDR5 bulk buying guide.
Who Makes HBM in 2026?
Three companies ship HBM at scale, and a fourth is sampling.
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Maker
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HBM status (Oct 2026)
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Main customers
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SK Hynix
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Market leader; HBM3E in volume, HBM4 shipping
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Nvidia (main supplier)
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Samsung
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HBM4 shipping since early 2026
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Nvidia, AMD
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Micron
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16 high HBM4 samples; 2026 HBM4 output sold out
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Nvidia
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CXMT
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HBM3E samples in qualification, about 3 to 5 years behind
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Chinese AI chip firms
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TSMC now plays a role too, since it makes the logic base die for several HBM4 suppliers. For a wider view of the DRAM field, see our list of memory RAM manufacturers for OEM buyers.
Can You Buy HBM Memory?
Not on its own. HBM isn't sold as sticks or loose chips, since each stack is bonded inside a GPU or accelerator package at the factory. Makers allocate it to Nvidia, AMD and a few large chip designers, so a business gets HBM only by buying those accelerators.
For servers and workstations, the practical lever is DDR5 RDIMM capacity next to the accelerators. Digiera builds DDR4 and DDR5 modules with OEM and ODM support, and you can request a quote on Digiera's memory RAM manufacturing page.
Does AI Inference Need Less HBM Than Training?
Training builds a model once, and it needs the fastest memory money can buy. Inference is different, since it runs every time someone uses the model, for as long as the model lives. Most of that work rereads the same stored weights.
That shifts the goal from top speed at any price toward enough bandwidth at the lowest cost per GB. Training will stay on HBM. A growing share of inference memory, though, could move to cheaper tiers sitting below it.
Will High Bandwidth Flash Replace HBM?
No, it's built to sit underneath it. SK Hynix and SanDisk published the HBF standard in August 2026, with Google and Tenstorrent in the consortium. It stacks 8 or 16 NAND dies for up to 512GB and 0.4 to 3 TB/s, linked to the processor over UCIe.
Flash reaches that bandwidth by running many chips in parallel, not by being faster per access, so its latency stays far above DRAM. That works for inference, which mostly reads weights, while training stays on HBM. HBF is still a published spec, not shipping silicon, and memory qualification takes years. NAND makers, such as the top internal SSD manufacturers, are the ones positioned to build it.
FAQs
Why is HBM so expensive?
Packaging drives the cost. TSVs, die thinning, stacking, the base die and the interposer all add steps, and one failed die scraps the whole stack.
How is HBM different from DDR5 and GDDR?
HBM stacks dies inside the processor package with a 1,024 or 2,048 bit bus. DDR5 sits on removable sticks, and GDDR is soldered around a graphics chip.
Who makes HBM memory?
SK Hynix, Samsung and Micron make nearly all of it. SK Hynix leads, and China's CXMT has HBM3E samples in qualification.
Why does AI need HBM?
AI chips process huge amounts of data at once, and regular memory can't feed them fast enough. HBM delivers terabytes per second right beside the chip.
Do gaming graphics cards use HBM?
Not today. AMD used HBM in the Radeon R9 Fury, Vega and Radeon VII cards, but gaming GPUs now use GDDR because it costs much less.
Does the HBM shortage raise DDR5 prices?
Yes. HBM takes about three times the wafer of DDR5 per bit, so every wafer moved to HBM leaves less for regular RAM.
Is High Bandwidth Flash faster than HBM?
No. HBF tops out near 3 TB/s with much higher latency. It trades speed for capacity, up to 512GB per stack, for AI inference.
What is the difference between HBM3E and HBM4?
HBM4 doubles the bus to 2,048 bits and lifts bandwidth from about 1.2 TB/s to 2 TB/s per stack, with its base die made on a logic process.
